diff options
author | Ville Syrjälä <[email protected]> | 2014-09-03 14:09:50 +0300 |
---|---|---|
committer | Daniel Vetter <[email protected]> | 2014-09-03 15:14:03 +0200 |
commit | c317adcd58cdc05badd73db901c677164050ab6c (patch) | |
tree | f58c2331f3dadc4fa81a5022c3bd112d33be9953 | |
parent | 3d45eb8949efdcafc59769dd584fdf9f94bb6e53 (diff) |
drm/i915: Don't call gen8_fbc_sw_flush() on chv
CHV doesn't have FBC, so don't go calling gen8_fbc_sw_flush() on it.
Cc: Rodrigo Vivi <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
[danvet: Add a FIXME comment while at it that we should rework this a
lot more.]
Signed-off-by: Daniel Vetter <[email protected]>
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d49d639bd383..b8a00ed67e09 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9098,7 +9098,12 @@ void intel_frontbuffer_flush(struct drm_device *dev, intel_edp_psr_flush(dev, frontbuffer_bits); - if (IS_GEN8(dev)) + /* + * FIXME: Unconditional fbc flushing here is a rather gross hack and + * needs to be reworked into a proper frontbuffer tracking scheme like + * psr employs. + */ + if (IS_BROADWELL(dev)) gen8_fbc_sw_flush(dev, FBC_REND_CACHE_CLEAN); } |