diff options
| author | Janne Huttunen <[email protected]> | 2015-08-13 16:21:33 +0300 |
|---|---|---|
| committer | Ralf Baechle <[email protected]> | 2015-09-03 12:08:08 +0200 |
| commit | c0034c30ed301e28c72dc516156baabf5840ce5f (patch) | |
| tree | ae51392d6dc6daf61e699555380bb37832a7f409 | |
| parent | af0cfb2c44ee5cd3c86d1ffd054d318f536cb6dd (diff) | |
MIPS: Octeon: Fix CN6880 hang on XAUI init
Some CN68XX series Octeon II chips seem to hang if a reset is issued on
XAUI initialization. Avoid the hang by disabling the reset on affected
models. Tested on Cavium EBB6800 evaluation board and Kontron S1901 board.
Signed-off-by: Janne Huttunen <[email protected]>
Signed-off-by: Aaro Koskinen <[email protected]>
Acked-by: David Daney <[email protected]>
Cc: David Daney <[email protected]>
Cc: [email protected]
Cc: Janne Huttunen <[email protected]>
Cc: Aaro Koskinen <[email protected]>
Cc: Greg Kroah-Hartman <[email protected]>
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/10970/
Signed-off-by: Ralf Baechle <[email protected]>
| -rw-r--r-- | arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c b/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c index 7653b7e92197..323a784f7071 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c @@ -151,7 +151,12 @@ int __cvmx_helper_xaui_enable(int interface) /* (4)c Aply reset sequence */ xauiCtl.u64 = cvmx_read_csr(CVMX_PCSXX_CONTROL1_REG(interface)); xauiCtl.s.lo_pwr = 0; - xauiCtl.s.reset = 1; + + /* Issuing a reset here seems to hang some CN68XX chips. */ + if (!OCTEON_IS_MODEL(OCTEON_CN68XX_PASS1_X) && + !OCTEON_IS_MODEL(OCTEON_CN68XX_PASS2_X)) + xauiCtl.s.reset = 1; + cvmx_write_csr(CVMX_PCSXX_CONTROL1_REG(interface), xauiCtl.u64); /* Wait for PCS to come out of reset */ |