diff options
| author | Krishna chaitanya chundru <[email protected]> | 2024-06-19 20:41:11 +0530 |
|---|---|---|
| committer | Krzysztof Wilczyński <[email protected]> | 2024-07-04 14:46:09 +0000 |
| commit | bdf8e4d5d68ff78ea5c0f3f61c4f93c2305d69cf (patch) | |
| tree | 012180c2072c587d7db7ecf4553ebc9dad46c772 | |
| parent | a3ec59e982e08366fa755730bbe803f7ed042391 (diff) | |
dt-bindings: PCI: qcom: Add OPP table
PCIe needs to choose the appropriate performance state of RPMh power
domain based on the PCIe gen speed.
Adding the Operating Performance Points table allows to adjust power
domain performance state and ICC peak bw, depending on the PCIe data
rate and link width.
Link: https://lore.kernel.org/linux-pci/[email protected]
Signed-off-by: Krishna chaitanya chundru <[email protected]>
Signed-off-by: Krzysztof Wilczyński <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml index 1496d6993ab4..d8c0afaa4b19 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml @@ -69,6 +69,10 @@ properties: - const: msi6 - const: msi7 + operating-points-v2: true + opp-table: + type: object + resets: maxItems: 1 |