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authorPierre-Louis Bossart <[email protected]>2024-04-04 14:03:54 -0500
committerMark Brown <[email protected]>2024-04-04 20:25:37 +0100
commitbd5863f9ef12e26c2cfdce9c0adbf0222c731a3c (patch)
treece8d4ef04842c1b6fd3cd77d7f6c0a347681fac9
parentfe4a074542563c539f6285de1ec78b47f9c9da7d (diff)
ASoC: SOF: Intel: hda-ctrl: add missing WAKE_STS clear
For some reason, the programming sequences in the SOF driver do not include a clear of the WAKE_STS bits before resetting the controller. This clear is not formally required by the HDaudio specification, but was added to harden the snd-hda-reset back in 2007. Adding this sequence back avoids an issue reported by the Intel CI. Closes: https://github.com/thesofproject/linux/issues/4889 Reviewed-by: Péter Ujfalusi <[email protected]> Reviewed-by: Bard Liao <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
-rw-r--r--sound/soc/sof/intel/hda-ctrl.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/sound/soc/sof/intel/hda-ctrl.c b/sound/soc/sof/intel/hda-ctrl.c
index 84bf01bd360a..b4f0756e21f6 100644
--- a/sound/soc/sof/intel/hda-ctrl.c
+++ b/sound/soc/sof/intel/hda-ctrl.c
@@ -184,6 +184,7 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev)
struct hdac_bus *bus = sof_to_bus(sdev);
struct hdac_stream *stream;
int sd_offset, ret = 0;
+ u32 gctl;
if (bus->chip_init)
return 0;
@@ -192,6 +193,12 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev)
hda_dsp_ctrl_misc_clock_gating(sdev, false);
+ /* clear WAKE_STS if not in reset */
+ gctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_GCTL);
+ if (gctl & SOF_HDA_GCTL_RESET)
+ snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,
+ SOF_HDA_WAKESTS, SOF_HDA_WAKESTS_INT_MASK);
+
/* reset HDA controller */
ret = hda_dsp_ctrl_link_reset(sdev, true);
if (ret < 0) {