diff options
author | Manivannan Sadhasivam <[email protected]> | 2023-07-20 11:10:49 +0530 |
---|---|---|
committer | Bjorn Andersson <[email protected]> | 2023-07-21 20:16:48 -0700 |
commit | bbbef6e24bc4493602df68b052f6f48d48e3184a (patch) | |
tree | 049d6d4536fb6be22e73712a86e3e849c0559973 | |
parent | 4b6ea15c0a1122422b44bf6c47a3c22fc8d46777 (diff) |
arm64: dts: qcom: sdm845: Fix the min frequency of "ice_core_clk"
Minimum frequency of the "ice_core_clk" should be 75MHz as specified in the
downstream vendor devicetree. So fix it!
https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LA.UM.7.3.r1-09300-sdm845.0/arch/arm64/boot/dts/qcom/sdm845.dtsi
Fixes: 433f9a57298f ("arm64: dts: sdm845: add Inline Crypto Engine registers and clock")
Signed-off-by: Manivannan Sadhasivam <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
-rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 9ed74bf72d05..89520a9fe1e3 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2614,7 +2614,7 @@ <0 0>, <0 0>, <0 0>, - <0 300000000>; + <75000000 300000000>; status = "disabled"; }; |