arm64: dts: imx8mq-evk: Unbypass audio_pll1

Making audio_pll1 parent of audio_pll1_bypass, will allow
setting rates multiple of 8000 for children.

After unbypass clk hierarchy looks like this:
 * osc_25m
   * audio_pll1
     * audio_pll1_bypass
       * audio_pll1_out
         * sai2
           * sai2_root_clk

Signed-off-by: Daniel Baluta <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>

1 files changed, 3 insertions, 3 deletions

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index e3df9b8cd9ca..05958124f173 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -118,9 +118,9 @@
 &sai2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_sai2>;
-	assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
-	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
-	assigned-clock-rates = <24576000>;
+	assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1_BYPASS>, <&clk IMX8MQ_CLK_SAI2>;
+	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL1_OUT>;
+	assigned-clock-rates = <0>, <24576000>;
 	status = "okay";
 };