diff options
| author | Srinivasa Rao Mandadapu <[email protected]> | 2022-06-13 13:54:02 +0530 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2022-06-25 14:47:17 -0500 |
| commit | b9e3f65ecf85854c9717467c3cffaca194edd19f (patch) | |
| tree | fddf756040717d8ad5637ec024c8e8ad5f1df838 | |
| parent | b74f7b8f174f0ce2261cc05050dcbfed3314ab1e (diff) | |
arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset
Add pinmux nodes for primary and secondary I2S for SC7280 based platforms.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 14 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc7280.dtsi | 40 |
2 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index 5eb668991e24..acf407a4327d 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -367,6 +367,20 @@ bias-disable; }; +&mi2s1_data0 { + drive-strength = <6>; + bias-disable; +}; + +&mi2s1_sclk { + drive-strength = <6>; + bias-disable; +}; + +&mi2s1_ws { + drive-strength = <6>; +}; + &pm7325_gpios { key_vol_up_default: key-vol-up-default { pins = "gpio6"; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 41da63ecb876..046aee0e95e2 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3893,6 +3893,46 @@ function = "edp_hot"; }; + mi2s0_data0: mi2s0-data0 { + pins = "gpio98"; + function = "mi2s0_data0"; + }; + + mi2s0_data1: mi2s0-data1 { + pins = "gpio99"; + function = "mi2s0_data1"; + }; + + mi2s0_mclk: mi2s0-mclk { + pins = "gpio96"; + function = "pri_mi2s"; + }; + + mi2s0_sclk: mi2s0-sclk { + pins = "gpio97"; + function = "mi2s0_sck"; + }; + + mi2s0_ws: mi2s0-ws { + pins = "gpio100"; + function = "mi2s0_ws"; + }; + + mi2s1_data0: mi2s1-data0 { + pins = "gpio107"; + function = "mi2s1_data0"; + }; + + mi2s1_sclk: mi2s1-sclk { + pins = "gpio106"; + function = "mi2s1_sck"; + }; + + mi2s1_ws: mi2s1-ws { + pins = "gpio108"; + function = "mi2s1_ws"; + }; + pcie1_clkreq_n: pcie1-clkreq-n { pins = "gpio79"; function = "pcie1_clkreqn"; |