diff options
| author | Dinh Nguyen <dinguyen@kernel.org> | 2021-01-05 14:55:20 -0600 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2021-01-07 12:30:00 -0600 |
| commit | b82a27075a0402386ba61c0404b47b69e7dc7911 (patch) | |
| tree | aa8d19c192250394c53ecc2e1c436fcbad73e022 | |
| parent | a427485a009348f0c7a498e34788a4c5adcc7128 (diff) | |
ARM: dts: arria10: add PMU node
Add the PMU node for Arria10.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria10.dtsi | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 0013ec3463c4..a574ea91d9d3 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -15,13 +15,13 @@ #size-cells = <0>; enable-method = "altr,socfpga-a10-smp"; - cpu@0 { + cpu0: cpu@0 { compatible = "arm,cortex-a9"; device_type = "cpu"; reg = <0>; next-level-cache = <&L2>; }; - cpu@1 { + cpu1: cpu@1 { compatible = "arm,cortex-a9"; device_type = "cpu"; reg = <1>; @@ -29,6 +29,15 @@ }; }; + pmu: pmu@ff111000 { + compatible = "arm,cortex-a9-pmu"; + interrupt-parent = <&intc>; + interrupts = <0 124 4>, <0 125 4>; + interrupt-affinity = <&cpu0>, <&cpu1>; + reg = <0xff111000 0x1000>, + <0xff113000 0x1000>; + }; + intc: intc@ffffd000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; |