diff options
| author | Wolfram Sang <[email protected]> | 2017-07-19 10:27:52 +0200 |
|---|---|---|
| committer | Wim Van Sebroeck <[email protected]> | 2017-09-09 20:23:08 +0200 |
| commit | b51247c8029660a9c49ad48bf38f364479c96215 (patch) | |
| tree | b6c6025459a2eb99400df22036aae62f4dfa7eda | |
| parent | f6159dd4b085ad839ab02c1ba230535c53ef60d4 (diff) | |
watchdog: renesas_wdt: check rate also for upper limit
When checking the clock rate, ensure also that counting all 16 bits
takes at least one second to match the granularity of the framework.
Signed-off-by: Wolfram Sang <[email protected]>
Reviewed-by: Guenter Roeck <[email protected]>
Signed-off-by: Guenter Roeck <[email protected]>
Signed-off-by: Wim Van Sebroeck <[email protected]>
| -rw-r--r-- | drivers/watchdog/renesas_wdt.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/watchdog/renesas_wdt.c b/drivers/watchdog/renesas_wdt.c index 22b0348826de..8437dd521532 100644 --- a/drivers/watchdog/renesas_wdt.c +++ b/drivers/watchdog/renesas_wdt.c @@ -134,14 +134,14 @@ static int rwdt_probe(struct platform_device *pdev) for (i = ARRAY_SIZE(clk_divs) - 1; i >= 0; i--) { clks_per_sec = DIV_ROUND_UP(rate, clk_divs[i]); - if (clks_per_sec) { + if (clks_per_sec && clks_per_sec < 65536) { priv->clks_per_sec = clks_per_sec; priv->cks = i; break; } } - if (!clks_per_sec) { + if (i < 0) { dev_err(&pdev->dev, "Can't find suitable clock divider\n"); return -ERANGE; } |