diff options
| author | Thong Thai <[email protected]> | 2020-08-27 11:35:13 -0400 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2020-10-05 15:15:27 -0400 |
| commit | b4e532d67821e9ccd1757b6458c72a7d02b107ce (patch) | |
| tree | 5171bd005a8ba413ffb17432ef4988254c944f62 | |
| parent | 4d8d75a45c7ce7f6a0b9dff510be5be8e34febb4 (diff) | |
drm/amdgpu: enable vcn3.0 for van gogh
Same as other VCN 3.0 asics.
Signed-off-by: Thong Thai <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nv.c | 2 |
2 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c index 495c3d7bb2b2..81102598cde7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c @@ -44,6 +44,7 @@ #define FIRMWARE_NAVI12 "amdgpu/navi12_vcn.bin" #define FIRMWARE_SIENNA_CICHLID "amdgpu/sienna_cichlid_vcn.bin" #define FIRMWARE_NAVY_FLOUNDER "amdgpu/navy_flounder_vcn.bin" +#define FIRMWARE_VANGOGH "amdgpu/vangogh_vcn.bin" MODULE_FIRMWARE(FIRMWARE_RAVEN); MODULE_FIRMWARE(FIRMWARE_PICASSO); @@ -55,6 +56,7 @@ MODULE_FIRMWARE(FIRMWARE_NAVI14); MODULE_FIRMWARE(FIRMWARE_NAVI12); MODULE_FIRMWARE(FIRMWARE_SIENNA_CICHLID); MODULE_FIRMWARE(FIRMWARE_NAVY_FLOUNDER); +MODULE_FIRMWARE(FIRMWARE_VANGOGH); static void amdgpu_vcn_idle_work_handler(struct work_struct *work); @@ -123,6 +125,12 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev) (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)) adev->vcn.indirect_sram = true; break; + case CHIP_VANGOGH: + fw_name = FIRMWARE_VANGOGH; + if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) && + (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)) + adev->vcn.indirect_sram = true; + break; default: return -EINVAL; } diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c index da6eed18110d..1666d43197cb 100644 --- a/drivers/gpu/drm/amd/amdgpu/nv.c +++ b/drivers/gpu/drm/amd/amdgpu/nv.c @@ -577,6 +577,8 @@ int nv_set_ip_blocks(struct amdgpu_device *adev) amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block); amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block); + amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block); + amdgpu_device_ip_block_add(adev, &jpeg_v3_0_ip_block); break; default: return -EINVAL; |