diff options
| author | Mingwei Zhang <[email protected]> | 2023-09-12 18:45:48 +0000 |
|---|---|---|
| committer | Sean Christopherson <[email protected]> | 2023-09-27 13:29:31 -0700 |
| commit | b207cfbc8c1d04a32d19919a0df9920e909f82a5 (patch) | |
| tree | 3b9c294b01f34d34536b22238f7cdfb484de41dd | |
| parent | 57f33f1a8756c980acb335852e802e656be8aec0 (diff) | |
KVM: Documentation: Add the missing description for guest_mode in kvm_mmu_page_role
Add the missing description for guest_mode in kvm_mmu_page_role
description. guest_mode tells KVM whether a shadow page is used for the L1
or an L2. Update the missing field in documentation.
Signed-off-by: Mingwei Zhang <[email protected]>
Reviewed-by: Kai Huang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Sean Christopherson <[email protected]>
| -rw-r--r-- | Documentation/virt/kvm/x86/mmu.rst | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/virt/kvm/x86/mmu.rst b/Documentation/virt/kvm/x86/mmu.rst index d47595b33fcf..47392c5d0a4a 100644 --- a/Documentation/virt/kvm/x86/mmu.rst +++ b/Documentation/virt/kvm/x86/mmu.rst @@ -202,6 +202,8 @@ Shadow pages contain the following information: Is 1 if the MMU instance cannot use A/D bits. EPT did not have A/D bits before Haswell; shadow EPT page tables also cannot use A/D bits if the L1 hypervisor does not enable them. + role.guest_mode: + Indicates the shadow page is created for a nested guest. role.passthrough: The page is not backed by a guest page table, but its first entry points to one. This is set if NPT uses 5-level page tables (host |