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authorMathias Krause <[email protected]>2015-07-24 09:15:11 +0200
committerIngo Molnar <[email protected]>2015-07-31 10:34:07 +0200
commitb1c599b8ff80ea79b9f8277a3f9f36a7b0cfedce (patch)
treec031486fbbb4ecb7618e5dfb2a246a9d9bb8f048
parentb51ef52df71cb28e9d90cd1d48b79bf19f0bab06 (diff)
x86/cpufeature: Add feature bit for Intel's Silicon Debug CPUID bit
Add a CPUID feature bit for the SDBG (Silicon Debug) CPU feature found on recent Intel systems starting with Haswell. Using the IA32_DEBUG_INTERFACE MSR (index C80H) one can at least detect if SDBG has been enabled by the firmware and if it has been used or not. Signed-off-by: Mathias Krause <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Cc: Aaron Lu <[email protected]> Cc: Dave Hansen <[email protected]> Cc: Dirk Brandewie <[email protected]> Cc: H. Peter Anvin <[email protected]> Cc: Josh Triplett <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Ross Zwisler <[email protected]> Cc: Thomas Gleixner <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
-rw-r--r--arch/x86/include/asm/cpufeature.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 3d6606fb97d0..4b11974b4ea7 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -119,6 +119,7 @@
#define X86_FEATURE_TM2 ( 4*32+ 8) /* Thermal Monitor 2 */
#define X86_FEATURE_SSSE3 ( 4*32+ 9) /* Supplemental SSE-3 */
#define X86_FEATURE_CID ( 4*32+10) /* Context ID */
+#define X86_FEATURE_SDBG ( 4*32+11) /* Silicon Debug */
#define X86_FEATURE_FMA ( 4*32+12) /* Fused multiply-add */
#define X86_FEATURE_CX16 ( 4*32+13) /* CMPXCHG16B */
#define X86_FEATURE_XTPR ( 4*32+14) /* Send Task Priority Messages */