diff options
| author | Richard Zhu <[email protected]> | 2022-07-14 15:31:05 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <[email protected]> | 2022-08-01 15:33:54 -0500 |
| commit | af48f8226e94555bd3c5f93a437acf714024c2c3 (patch) | |
| tree | 44751aa809501262df47c06e4e2989cbad734267 | |
| parent | 508919d0a95c04ef04469e60776146a9795c07cf (diff) | |
PCI: imx6: Reduce resume time by only starting link if it was up before suspend
i.MX PCIe doesn't support hotplug. During resume, only start PCIe link
training when the link was up before system suspend to avoid the long
latency in the link training period.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Richard Zhu <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
| -rw-r--r-- | drivers/pci/controller/dwc/pci-imx6.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index a693286c9843..33c5089eb46e 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -67,6 +67,7 @@ struct imx6_pcie { struct dw_pcie *pci; int reset_gpio; bool gpio_active_high; + bool link_is_up; struct clk *pcie_bus; struct clk *pcie_phy; struct clk *pcie_inbound_axi; @@ -881,11 +882,13 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) dev_info(dev, "Link: Gen2 disabled\n"); } + imx6_pcie->link_is_up = true; tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA); dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS); return 0; err_reset_phy: + imx6_pcie->link_is_up = false; dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n", dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0), dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1)); @@ -1031,7 +1034,9 @@ static int imx6_pcie_resume_noirq(struct device *dev) return ret; dw_pcie_setup_rc(pp); - imx6_pcie_start_link(imx6_pcie->pci); + if (imx6_pcie->link_is_up) + imx6_pcie_start_link(imx6_pcie->pci); + return 0; } |