diff options
| author | Thomas Gleixner <[email protected]> | 2020-11-10 15:34:32 +0100 |
|---|---|---|
| committer | Thomas Gleixner <[email protected]> | 2020-11-10 18:43:22 +0100 |
| commit | aec8da04e4d71afdd4ab3025ea34a6517435f363 (patch) | |
| tree | e9098bb02fb0f5335a7384f5a044a37b521cbf46 | |
| parent | f36a74b9345aebaf5d325380df87a54720229d18 (diff) | |
x86/ioapic: Correct the PCI/ISA trigger type selection
PCI's default trigger type is level and ISA's is edge. The recent
refactoring made it the other way round, which went unnoticed as it seems
only to cause havoc on some AMD systems.
Make the comment and code do the right thing again.
Fixes: a27dca645d2c ("x86/io_apic: Cleanup trigger/polarity helpers")
Reported-by: Tom Lendacky <[email protected]>
Reported-by: Borislav Petkov <[email protected]>
Reported-by: Qian Cai <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Tested-by: Tom Lendacky <[email protected]>
Cc: David Woodhouse <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/x86/kernel/apic/io_apic.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 0602c9533d17..089e755eadf6 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -809,9 +809,9 @@ static bool irq_is_level(int idx) case MP_IRQTRIG_DEFAULT: /* * Conforms to spec, ie. bus-type dependent trigger - * mode. PCI defaults to egde, ISA to level. + * mode. PCI defaults to level, ISA to edge. */ - level = test_bit(bus, mp_bus_not_pci); + level = !test_bit(bus, mp_bus_not_pci); /* Take EISA into account */ return eisa_irq_is_level(idx, bus, level); case MP_IRQTRIG_EDGE: |