diff options
| author | Krzysztof Kozlowski <[email protected]> | 2022-07-04 15:06:18 +0200 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2022-07-04 16:58:00 +0100 |
| commit | acfc34f008c3e66bbcb7b9162c80c8327b6e800f (patch) | |
| tree | e3c60a5214bd61eb7a09c078097d38d65441d695 | |
| parent | 6eee27c598fde65988723b785a9c9192d5ffb93a (diff) | |
spi: dt-bindings: zynqmp-qspi: add missing 'required'
During the conversion the bindings lost list of required properties.
Fixes: c58db2abb19f ("spi: convert Xilinx Zynq UltraScale+ MPSoC GQSPI bindings to YAML")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml index ea72c8001256..fafde1c06be6 100644 --- a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml +++ b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml @@ -30,6 +30,13 @@ properties: clocks: maxItems: 2 +required: + - compatible + - reg + - interrupts + - clock-names + - clocks + unevaluatedProperties: false examples: |