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authorAric Cyr <[email protected]>2023-01-15 23:21:20 -0500
committerAlex Deucher <[email protected]>2023-01-24 13:26:26 -0500
commitacd82cb42bd7cbffeaab15818b4334159b6f6e5a (patch)
tree87f8c9fcdd0506c23d6adcb36e2f4ee86473cbdf
parent0f5f1ee45ff8e76916be2290ef91cc2234450ccb (diff)
drm/amd/display: 3.2.220
This version brings along following fixes: - Fix timing not changning when freesync video is enabled - avoid disable otg when dig was disabled - Properly reuse completion structure - Pass DSC slice height to PSR FW - merge dc_link_dp into dc_link - move dp cts functions from dc_link_dp to link_dp_cts - move dp irq handler functions from dc_link_dp to link_dp_irq_handler - Enable AdaptiveSync in DC interface - adjust MALL size available for DCN32 and DCN321 - Set init freq for DCFCLK DS - Use |= when assigning wm_optimized_required - move eDP panel control logic to link_edp_panel_control - create accessories, hwss and protocols sub folders in link - Disable SubVP for PSR panels Acked-by: Alan Liu <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index e967455ed0c7..42ce45306483 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -47,7 +47,7 @@ struct aux_payload;
struct set_config_cmd_payload;
struct dmub_notification;
-#define DC_VER "3.2.219"
+#define DC_VER "3.2.220"
#define MAX_SURFACES 3
#define MAX_PLANES 6