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| author | Dmitry Rokosov <[email protected]> | 2024-03-20 18:54:46 +0300 |
|---|---|---|
| committer | Jerome Brunet <[email protected]> | 2024-03-29 12:07:33 +0100 |
| commit | acc628adc363d441a4bbd05d92ed30253db006ff (patch) | |
| tree | 1589d409df83a1c572a98b2a6fbdcb982f438c9c | |
| parent | b6e2c6548074d77e15af8fb6a5a7d03578f04b2f (diff) | |
clk: meson: a1: pll: determine maximum register in regmap config
When the max_register value is not set, the regmap debugfs 'registers'
file does not display the entire range of the regmap.
Signed-off-by: Dmitry Rokosov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jerome Brunet <[email protected]>
| -rw-r--r-- | drivers/clk/meson/a1-pll.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/meson/a1-pll.c b/drivers/clk/meson/a1-pll.c index 4325e8a6a3ef..90b0aeeb049c 100644 --- a/drivers/clk/meson/a1-pll.c +++ b/drivers/clk/meson/a1-pll.c @@ -299,6 +299,7 @@ static struct regmap_config a1_pll_regmap_cfg = { .reg_bits = 32, .val_bits = 32, .reg_stride = 4, + .max_register = ANACTRL_HIFIPLL_STS, }; static struct meson_clk_hw_data a1_pll_clks = { |