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authorDoug Brown <[email protected]>2022-06-12 12:29:29 -0700
committerStephen Boyd <[email protected]>2022-09-30 13:34:06 -0700
commitac1d62c948d063ec99b3b23d02af8260bba4660c (patch)
tree9bf9f162625b988a8ba94c83c39fd2c207c0e7e5
parent260d2f347b765422584a5fa5209b8ecd17d773b4 (diff)
clk: mmp: pxa168: add new clocks for peripherals
This commit adds three new clocks that previously didn't exist, but are needed in order to match the clock parenting as described in the PXA168 datasheet. Signed-off-by: Doug Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
-rw-r--r--drivers/clk/mmp/clk-of-pxa168.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/mmp/clk-of-pxa168.c b/drivers/clk/mmp/clk-of-pxa168.c
index 88b5200262d9..2526d56a450b 100644
--- a/drivers/clk/mmp/clk-of-pxa168.c
+++ b/drivers/clk/mmp/clk-of-pxa168.c
@@ -91,6 +91,9 @@ static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {
{PXA168_CLK_PLL1_13_1_5, "pll1_13_1_5", "pll1_13", 1, 5, 0},
{PXA168_CLK_PLL1_2_1_5, "pll1_2_1_5", "pll1_2", 1, 5, 0},
{PXA168_CLK_PLL1_3_16, "pll1_3_16", "pll1", 3, 16, 0},
+ {PXA168_CLK_PLL1_2_1_10, "pll1_2_1_10", "pll1_2", 1, 10, 0},
+ {PXA168_CLK_PLL1_2_3_16, "pll1_2_3_16", "pll1_2", 3, 16, 0},
+ {PXA168_CLK_CLK32_2, "clk32_2", "clk32", 1, 2, 0},
};
static struct mmp_clk_factor_masks uart_factor_masks = {