diff options
| author | Sebastian Reichel <[email protected]> | 2024-04-09 00:50:32 +0200 |
|---|---|---|
| committer | Heiko Stuebner <[email protected]> | 2024-04-12 15:51:45 +0200 |
| commit | abe68e0ca71dddce0e5419e35507cb464d61870d (patch) | |
| tree | 06f9f1e5738562e382e292c5462c661159355691 | |
| parent | 4e07a95f7402de092cd71b2cb96c69f85c98f251 (diff) | |
arm64: dts: rockchip: reorder usb2phy properties for rk3588
Reorder common DT properties alphabetically for usb2phy, according
to latest DT style rules.
Signed-off-by: Sebastian Reichel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 87df09022735..58d12969b7ee 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -602,13 +602,13 @@ u2phy2: usb2phy@8000 { compatible = "rockchip,rk3588-usb2phy"; reg = <0x8000 0x10>; - interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH 0>; - resets = <&cru SRST_OTGPHY_U2_0>, <&cru SRST_P_USB2PHY_U2_0_GRF0>; - reset-names = "phy", "apb"; + #clock-cells = <0>; clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; clock-names = "phyclk"; clock-output-names = "usb480m_phy2"; - #clock-cells = <0>; + interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH 0>; + resets = <&cru SRST_OTGPHY_U2_0>, <&cru SRST_P_USB2PHY_U2_0_GRF0>; + reset-names = "phy", "apb"; status = "disabled"; u2phy2_host: host-port { @@ -627,13 +627,13 @@ u2phy3: usb2phy@c000 { compatible = "rockchip,rk3588-usb2phy"; reg = <0xc000 0x10>; - interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH 0>; - resets = <&cru SRST_OTGPHY_U2_1>, <&cru SRST_P_USB2PHY_U2_1_GRF0>; - reset-names = "phy", "apb"; + #clock-cells = <0>; clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; clock-names = "phyclk"; clock-output-names = "usb480m_phy3"; - #clock-cells = <0>; + interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH 0>; + resets = <&cru SRST_OTGPHY_U2_1>, <&cru SRST_P_USB2PHY_U2_1_GRF0>; + reset-names = "phy", "apb"; status = "disabled"; u2phy3_host: host-port { |