diff options
| author | Ghennadi Procopciuc <[email protected]> | 2024-01-22 16:06:00 +0200 |
|---|---|---|
| committer | Shawn Guo <[email protected]> | 2024-03-28 14:37:05 +0800 |
| commit | abd9ba92bac5f49d5b24669b66a5806b6ceef248 (patch) | |
| tree | d848ad7e1dc3fdf79c822bd934bebc43a98b87b1 | |
| parent | 4cece764965020c22cff7665b18a012006359095 (diff) | |
arm64: dts: s32g: add SCMI firmware node
Linux controls the clocks over SCMI on S32G SoCs. Therefore,
add the SCMI device tree node and the reserved region for SCMI
messages.
Signed-off-by: Catalin Udma <[email protected]>
Signed-off-by: Ghennadi Procopciuc <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
Reviewed-by: Chester Lin <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/s32g2.dtsi | 27 |
1 files changed, 26 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi index 5ac1cc9ff50e..ef1a1d61f2ba 100644 --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi @@ -3,7 +3,7 @@ * NXP S32G2 SoC family * * Copyright (c) 2021 SUSE LLC - * Copyright (c) 2017-2021 NXP + * Copyright 2017-2021, 2024 NXP */ #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -14,6 +14,18 @@ #address-cells = <2>; #size-cells = <2>; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + scmi_buf: shm@d0000000 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0xd0000000 0x0 0x80>; + no-map; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -77,6 +89,19 @@ }; firmware { + scmi { + compatible = "arm,scmi-smc"; + arm,smc-id = <0xc20000fe>; + #address-cells = <1>; + #size-cells = <0>; + shmem = <&scmi_buf>; + + clks: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; |