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authorSteffen Trumtrar <[email protected]>2023-05-05 08:01:50 +0200
committerAlexandre Torgue <[email protected]>2023-05-16 17:09:03 +0200
commitab7a5cba8231306fce1125b4aadc9edda076902c (patch)
tree452d9cce733e2d6a7bcc8143a44bea164ff4396e
parent303f3fe1d88f7e45e0ab63f37c0949953b69fc10 (diff)
ARM: dts: stm32: Add alternate pinmux for sai2b on stm32mp15
Add another option for the SAI2B pins. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <[email protected]> Reviewed-by: Olivier Moysan <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
-rw-r--r--arch/arm/boot/dts/stm32mp15-pinctrl.dtsi24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index c20d59919fc9..f6661951258a 100644
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -1491,6 +1491,30 @@
};
};
+ sai2b_pins_d: sai2b-3 {
+ pins1 {
+ pinmux = <STM32_PINMUX('H', 2, AF10)>, /* SAI2_SCK_B */
+ <STM32_PINMUX('C', 0, AF8)>, /* SAI2_FS_B */
+ <STM32_PINMUX('H', 3, AF10)>; /* SAI2_MCLK_B */
+ slew-rate = <0>;
+ drive-push-pull;
+ bias-disable;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
+ bias-disable;
+ };
+ };
+
+ sai2b_sleep_pins_d: sai2b-sleep-3 {
+ pins1 {
+ pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* SAI2_SCK_B */
+ <STM32_PINMUX('C', 0, ANALOG)>, /* SAI2_FS_B */
+ <STM32_PINMUX('H', 3, ANALOG)>, /* SAI2_MCLK_B */
+ <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
+ };
+ };
+
sai4a_pins_a: sai4a-0 {
pins {
pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */