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authorTim Harvey <[email protected]>2021-07-27 09:11:01 -0700
committerShawn Guo <[email protected]>2021-08-14 12:39:27 +0800
commita9c577822e98c68f50031b3202c23be66b1ee6a4 (patch)
tree2013cdb2a82e39957515aa39d8475724f79afd91
parent590dc51bcaf2cb8bb5a6f3c68269fd660e6fad84 (diff)
arm64: dts: imx8mm-venice-gw7901: enable pull-down on gpio outputs
Enable internal pull-down on UART transceiver GPIO config pins. Signed-off-by: Tim Harvey <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
index efab0a7f9a3e..bafd5c8ea4e2 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
@@ -875,9 +875,9 @@
pinctrl_uart3_gpio: uart3gpiogrp {
fsl,pins = <
- MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x40000041 /* RS232# */
- MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000041 /* RS422# */
- MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x40000041 /* RS485# */
+ MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x40000110 /* RS232# */
+ MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000110 /* RS422# */
+ MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x40000110 /* RS485# */
>;
};