diff options
| author | Vasily Khoruzhick <[email protected]> | 2020-01-03 22:35:04 -0800 |
|---|---|---|
| committer | Maxime Ripard <[email protected]> | 2020-01-04 09:18:08 +0100 |
| commit | a9b5c6717837840adc5d58ab75f232905a3af9f7 (patch) | |
| tree | a663f0bacf50df0b4f7dcf953da63a2a6e163cff | |
| parent | ec97faff743b398e21f74a54c81333f3390093aa (diff) | |
clk: sunxi-ng: a64: export CLK_CPUX clock for DVFS
Export CLK_CPUX so we can reference it in CPU node.
Signed-off-by: Vasily Khoruzhick <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun50i-a64.h | 1 | ||||
| -rw-r--r-- | include/dt-bindings/clock/sun50i-a64-ccu.h | 1 |
2 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h index 979929276709..116e6f826d04 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h @@ -36,7 +36,6 @@ #define CLK_PLL_HSIC 18 #define CLK_PLL_DE 19 #define CLK_PLL_DDR1 20 -#define CLK_CPUX 21 #define CLK_AXI 22 #define CLK_APB 23 #define CLK_AHB1 24 diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h index a8ac4cfcdcbc..e512a1c9b0fc 100644 --- a/include/dt-bindings/clock/sun50i-a64-ccu.h +++ b/include/dt-bindings/clock/sun50i-a64-ccu.h @@ -46,6 +46,7 @@ #define CLK_PLL_VIDEO0 7 #define CLK_PLL_PERIPH0 11 +#define CLK_CPUX 21 #define CLK_BUS_MIPI_DSI 28 #define CLK_BUS_CE 29 #define CLK_BUS_DMA 30 |