diff options
| author | Biju Das <[email protected]> | 2024-08-05 14:17:05 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2024-08-23 15:50:04 +0200 |
| commit | a94a244a5b1a2040611aaaa17fd23dd908bc01ac (patch) | |
| tree | 2b1dc91f30cbb57b3b3214dc178efdbc087767fa | |
| parent | 833948fb2b63155847ab691a54800f801555429b (diff) | |
arm64: dts: renesas: r9a07g043u: Add FCPVD node
Add FCPVD node to RZ/G2UL SoC DTSI.
Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Laurent Pinchart <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi index 20fb5e41c598..4cfcef60680c 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi @@ -129,6 +129,17 @@ }; }; + fcpvd: fcp@10880000 { + compatible = "renesas,r9a07g043u-fcpvd", "renesas,fcpv"; + reg = <0 0x10880000 0 0x10000>; + clocks = <&cpg CPG_MOD R9A07G043_LCDC_CLK_A>, + <&cpg CPG_MOD R9A07G043_LCDC_CLK_P>, + <&cpg CPG_MOD R9A07G043_LCDC_CLK_D>; + clock-names = "aclk", "pclk", "vclk"; + power-domains = <&cpg>; + resets = <&cpg R9A07G043_LCDC_RESET_N>; + }; + irqc: interrupt-controller@110a0000 { compatible = "renesas,r9a07g043u-irqc", "renesas,rzg2l-irqc"; |