diff options
| author | Sunil Khatri <[email protected]> | 2024-07-09 11:24:39 +0530 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2024-07-10 10:13:04 -0400 |
| commit | a85cc86cce4183962c9ab80bf9c9c666aae174f8 (patch) | |
| tree | e56e0223cf1b6f87e7b73496fe8a06131c56ab4e | |
| parent | 7d570f56f1e1005cf5bb34ceec608432d2acb157 (diff) | |
drm/amdgpu: select compute ME engines dynamically
GFX ME right now is one but this could change in
future SOC's. Use no of ME for GFX as start point
for ME for compute for GFX11.
Signed-off-by: Sunil Khatri <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c index 4f57cf3dac48..dcef39907449 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c @@ -6456,7 +6456,7 @@ static void gfx_v11_ip_dump(void *handle) for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { for (k = 0; k < adev->gfx.mec.num_queue_per_pipe; k++) { /* ME0 is for GFX so start from 1 for CP */ - soc21_grbm_select(adev, 1+i, j, k, 0); + soc21_grbm_select(adev, adev->gfx.me.num_me + i, j, k, 0); for (reg = 0; reg < reg_count; reg++) { adev->gfx.ip_dump_compute_queues[index + reg] = RREG32(SOC15_REG_ENTRY_OFFSET( |