diff options
| author | Daniel Vetter <[email protected]> | 2012-01-26 17:18:47 +0100 |
|---|---|---|
| committer | Keith Packard <[email protected]> | 2012-01-28 17:37:42 -0800 |
| commit | a4ea430853b71753103ec693acfc8624bd3e748e (patch) | |
| tree | 3933fb384e1b65b52b056aae5e3c1a86b7ff68af | |
| parent | d56d8b28e9247e7e35e02fbb12b12239a2c33ad1 (diff) | |
drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT
An identical patch has been merged for i9xx_crtc_mode_set:
Commit 59df7b1771c150163e522f33c638096ab0efbf42
Author: Christian Schmidt <[email protected]>
Date: Mon Dec 19 20:03:33 2011 +0100
drm/intel: Fix initialization if startup happens in interlaced mode [v2]
But that one neglected to fix up the ironlake+ path.
This should fix the issue reported by Alfonso Fiore where booting with
only a HDMI cable connected to his TV failed to display anything. The
issue is that the bios set up things for 1080i and used the pannel
fitter to scale up the lower progressive resolutions. We failed to
clear the interlace bit in the PIPEACONF register, resulting in havoc.
Cc: Peter Ross <[email protected]>
Tested-by: Alfonso Fiore <[email protected]>
Signed-Off-by: Daniel Vetter <[email protected]>
Reviewed-by: Keith Packard <[email protected]>
Signed-off-by: Keith Packard <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 19f35eceba40..f1744aada98f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5912,7 +5912,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, adjusted_mode->crtc_vsync_end -= 1; adjusted_mode->crtc_vsync_start -= 1; } else - pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* progressive */ + pipeconf &= ~PIPECONF_INTERLACE_MASK; /* progressive */ I915_WRITE(HTOTAL(pipe), (adjusted_mode->crtc_hdisplay - 1) | |