diff options
author | Mark Hasemeyer <[email protected]> | 2024-01-02 14:07:39 -0700 |
---|---|---|
committer | Bjorn Andersson <[email protected]> | 2024-02-13 23:37:17 -0600 |
commit | a4b28b9ecc99673da875e214b1a06f1e0f0a24fa (patch) | |
tree | ca3ca9b2b2bd232c8b0959d81973de0733ec4e27 | |
parent | f172a341ec1f66bac2866720931594e81f02ad4d (diff) |
arm64: dts: qcom: sc7280: Enable cros-ec-spi as wake source
The cros_ec driver currently assumes that cros-ec-spi compatible device
nodes are a wakeup-source even though the wakeup-source property is not
defined.
Some Chromebooks use a separate wake pin, while others overload the
interrupt for wake and IO. With the current assumption, spurious wakes
can occur on systems that use a separate wake pin. It is planned to
update the driver to no longer assume that the EC interrupt pin should
be enabled for wake.
Add the wakeup-source property to all cros-ec-spi compatible device
nodes to signify to the driver that they should still be a valid wakeup
source.
Reviewed-by: Douglas Anderson <[email protected]>
Signed-off-by: Mark Hasemeyer <[email protected]>
Link: https://lore.kernel.org/r/20240102140734.v4.15.I7ea3f53272c9b7cd77633adfd18058ba443eed96@changeid
Signed-off-by: Bjorn Andersson <[email protected]>
-rw-r--r-- | arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 1 | ||||
-rw-r--r-- | arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi index 9ea6636125ad..2ba4ea60cb14 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi @@ -548,6 +548,7 @@ ap_ec_spi: &spi10 { pinctrl-names = "default"; pinctrl-0 = <&ap_ec_int_l>; spi-max-frequency = <3000000>; + wakeup-source; cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi index ebae545c587c..fbfac7534d3c 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi @@ -19,6 +19,7 @@ ap_ec_spi: &spi10 { pinctrl-names = "default"; pinctrl-0 = <&ap_ec_int_l>; spi-max-frequency = <3000000>; + wakeup-source; cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; |