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authorStefan Agner <[email protected]>2018-04-18 14:52:54 +0200
committerStephen Boyd <[email protected]>2018-05-04 19:55:15 -0700
commita43e86833b8754bfdbf9640c6c5616f27df8486f (patch)
treeb253cf30cee2f022633f9f366b227883b2b5e3b5
parent60cc43fc888428bb2f18f08997432d426a243338 (diff)
clk: imx6ul: fix periph clk2 clock mux selection
According to the data sheet the 3rd choice is the bypass clock of pll2. This should not have any effect in practice as this selection is not used currently. Signed-off-by: Stefan Agner <[email protected]> Acked-by: Shawn Guo <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
-rw-r--r--drivers/clk/imx/clk-imx6ul.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c
index 114ecbb94ec5..50d8fddc6fe4 100644
--- a/drivers/clk/imx/clk-imx6ul.c
+++ b/drivers/clk/imx/clk-imx6ul.c
@@ -40,7 +40,7 @@ static const char *axi_alt_sels[] = { "pll2_pfd2_396m", "pll3_pfd1_540m", };
static const char *axi_sels[] = {"periph", "axi_alt_sel", };
static const char *periph_pre_sels[] = { "pll2_bus", "pll2_pfd2_396m", "pll2_pfd0_352m", "pll2_198m", };
static const char *periph2_pre_sels[] = { "pll2_bus", "pll2_pfd2_396m", "pll2_pfd0_352m", "pll4_audio_div", };
-static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", };
+static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "pll2_bypass_src", };
static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "osc", };
static const char *periph_sels[] = { "periph_pre", "periph_clk2", };
static const char *periph2_sels[] = { "periph2_pre", "periph2_clk2", };