diff options
| author | Imre Deak <[email protected]> | 2024-07-22 19:54:54 +0300 |
|---|---|---|
| committer | Imre Deak <[email protected]> | 2024-07-31 18:45:59 +0300 |
| commit | a3f91f405aa7c54d0856c1b8698e4ff05ae7d439 (patch) | |
| tree | aeda8ce104049135961d65a9f3985f14a2488297 | |
| parent | a64d5fe490cd92d74b1cf46da63164cefcc61a58 (diff) | |
drm/i915/dp: Initialize the link parameters during HW readout
Initialize the DP link parameters during HW readout. These need to be
up-to-date at least for the MST topology probing, which depends on the
link rate and lane count programmed in DPCD. A follow-up patch will
program the DPCD values to reflect the maximum link parameters before
the first MST topology probing, but should do so only if the link is
disabled (link_trained==false).
Reviewed-by: Suraj Kandpal <[email protected]>
Signed-off-by: Imre Deak <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 86412ae7b48f..32964e15f3b1 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -3352,8 +3352,11 @@ void intel_dp_sync_state(struct intel_encoder *encoder, intel_dp_tunnel_resume(intel_dp, crtc_state, dpcd_updated); - if (crtc_state) + if (crtc_state) { intel_dp_reset_link_params(intel_dp); + intel_dp_set_link_params(intel_dp, crtc_state->port_clock, crtc_state->lane_count); + intel_dp->link_trained = true; + } } bool intel_dp_initial_fastset_check(struct intel_encoder *encoder, |