diff options
| author | Kevin Lo <[email protected]> | 2024-03-08 17:09:45 +0200 |
|---|---|---|
| committer | Kalle Valo <[email protected]> | 2024-03-11 14:53:58 +0200 |
| commit | a368b0a9854ee2a466a55f95c0ce2208e4aaf0b0 (patch) | |
| tree | 3a98b7271edd89148ff4026905ff205540ae581c | |
| parent | e57b7d62a1b2f496caf0beba81cec3c90fad80d5 (diff) | |
wifi: ath11k: adjust a comment to reflect reality
On QCA6390/QCN9074/WCN6855, MHISTATUS may still have SYSERR bit set
after SOC_GLOBAL_RESET.
Signed-off-by: Kevin Lo <[email protected]>
Acked-by: Jeff Johnson <[email protected]>
Signed-off-by: Kalle Valo <[email protected]>
Link: https://msgid.link/[email protected]
| -rw-r--r-- | drivers/net/wireless/ath/ath11k/mhi.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/net/wireless/ath/ath11k/mhi.c b/drivers/net/wireless/ath/ath11k/mhi.c index fb4ecf9a103e..ffc4c11111fc 100644 --- a/drivers/net/wireless/ath/ath11k/mhi.c +++ b/drivers/net/wireless/ath/ath11k/mhi.c @@ -158,9 +158,8 @@ void ath11k_mhi_set_mhictrl_reset(struct ath11k_base *ab) ath11k_dbg(ab, ATH11K_DBG_PCI, "mhistatus 0x%x\n", val); - /* Observed on QCA6390 that after SOC_GLOBAL_RESET, MHISTATUS - * has SYSERR bit set and thus need to set MHICTRL_RESET - * to clear SYSERR. + /* After SOC_GLOBAL_RESET, MHISTATUS may still have SYSERR bit set + * and thus need to set MHICTRL_RESET to clear SYSERR. */ ath11k_pcic_write32(ab, MHICTRL, MHICTRL_RESET_MASK); |