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authorDaehwan Jung <[email protected]>2024-06-10 20:39:13 +0900
committerGreg Kroah-Hartman <[email protected]>2024-06-20 19:30:30 +0200
commita353686e7f5f3f3eef3ac4561ae7ade1f8e5dfdd (patch)
tree26c2d0e264d8253321edd720c82a0e3ffd8b5246
parentbc162403e33e1d57e40994977acaf19f1434e460 (diff)
usb: host: xhci-plat: Add support for XHCI_WRITE_64_HI_LO
xHCI specification 5.1 "Register Conventions" states that 64 bit registers should be written in low-high order. All writing operations in xhci is done low-high order following the spec. Add a new quirk to support workaround for high-low order. Signed-off-by: Daehwan Jung <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
-rw-r--r--drivers/usb/host/xhci-plat.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
index 3d071b875308..31bdfa52eeb2 100644
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -256,6 +256,9 @@ int xhci_plat_probe(struct platform_device *pdev, struct device *sysdev, const s
if (device_property_read_bool(tmpdev, "xhci-sg-trb-cache-size-quirk"))
xhci->quirks |= XHCI_SG_TRB_CACHE_SIZE_QUIRK;
+ if (device_property_read_bool(tmpdev, "write-64-hi-lo-quirk"))
+ xhci->quirks |= XHCI_WRITE_64_HI_LO;
+
device_property_read_u32(tmpdev, "imod-interval-ns",
&xhci->imod_interval);
}