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authorManivannan Sadhasivam <[email protected]>2023-06-19 20:34:00 +0530
committerLorenzo Pieralisi <[email protected]>2023-06-20 12:12:44 +0200
commita33d700e8eea76c62120cb3dbf5e01328f18319a (patch)
treec5c9843b351c04bed58c94ddc542ac0b729b4c63
parentac9a78681b921877518763ba0e89202254349d1b (diff)
PCI: qcom: Disable write access to read only registers for IP v2.3.3
In the post init sequence of v2.9.0, write access to read only registers are not disabled after updating the registers. Fix it by disabling the access after register update. Link: https://lore.kernel.org/r/[email protected] Fixes: 5d76117f070d ("PCI: qcom: Add support for IPQ8074 PCIe controller") Signed-off-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Cc: <[email protected]>
-rw-r--r--drivers/pci/controller/dwc/pcie-qcom.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 4ab30892f6ef..ef385d36d653 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -836,6 +836,8 @@ static int qcom_pcie_post_init_2_3_3(struct qcom_pcie *pcie)
writel(PCI_EXP_DEVCTL2_COMP_TMOUT_DIS, pci->dbi_base + offset +
PCI_EXP_DEVCTL2);
+ dw_pcie_dbi_ro_wr_dis(pci);
+
return 0;
}