diff options
| author | Rex-BC Chen <[email protected]> | 2022-05-03 17:38:55 +0800 |
|---|---|---|
| committer | Matthias Brugger <[email protected]> | 2022-06-22 13:04:36 +0200 |
| commit | a30cc07f9e321e5b9ed26b3f14ee9637fd39b753 (patch) | |
| tree | ae43fe28ca02dc86cb22b276e586fad10c9ef780 | |
| parent | 0be021f900d332d2610900fb22e0408023bbd078 (diff) | |
arm64: dts: mediatek: Add infra #reset-cells property for MT8192
To support reset of infra, we add property of #reset-cells.
Signed-off-by: Rex-BC Chen <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Matthias Brugger <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8192.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 733aec2e7f77..13ba5fee4afa 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -271,6 +271,7 @@ compatible = "mediatek,mt8192-infracfg", "syscon"; reg = <0 0x10001000 0 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; }; pericfg: syscon@10003000 { |