diff options
| author | Marek Vasut <[email protected]> | 2022-08-01 15:17:46 +0200 |
|---|---|---|
| committer | Linus Walleij <[email protected]> | 2022-08-26 13:54:52 +0200 |
| commit | a2d6447a4a8ab314a6f82ab99f218689f9b0c306 (patch) | |
| tree | 85bae902b707e1e5a11a11ac9ed6711887164412 | |
| parent | 4d054ca9ad01004901f3ba988d77f7d298819c12 (diff) | |
dt-bindings: display: bridge: icn6211: Add support for external REFCLK
The ICN6211 is capable of deriving its internal PLL clock from either
MIPI DSI HS clock, external REFCLK clock, or even internal oscillator.
Currently supported is only the first option. Document support for
external REFCLK clock input in addition to that.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Jagan Teki <[email protected]>
Cc: Laurent Pinchart <[email protected]>
Cc: Linus Walleij <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Robert Foss <[email protected]>
Cc: Sam Ravnborg <[email protected]>
Cc: [email protected]
Cc: [email protected]
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
| -rw-r--r-- | Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml b/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml index 4f0b7c71313c..5fb54375aeb6 100644 --- a/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml +++ b/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml @@ -24,6 +24,15 @@ properties: maxItems: 1 description: virtual channel number of a DSI peripheral + clock-names: + const: refclk + + clocks: + maxItems: 1 + description: | + Optional external clock connected to REF_CLK input. + The clock rate must be in 10..154 MHz range. + enable-gpios: description: Bridge EN pin, chip is reset when EN is low. |