diff options
| author | Nicolas Pitre <[email protected]> | 2024-04-01 23:25:40 -0400 |
|---|---|---|
| committer | Daniel Lezcano <[email protected]> | 2024-04-23 12:40:30 +0200 |
| commit | a2ca202350f97bced8dac4cbfbb3cbf855973e57 (patch) | |
| tree | f882eb3c0d28502edccfbe7b69f3d3b852e107e8 | |
| parent | 2cc0b1a2169b0f4af83cc5a52a1693c8ab2e2f1d (diff) | |
dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT8186
Add LVTS thermal controller definition for MT8186.
Signed-off-by: Nicolas Pitre <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml | 2 | ||||
| -rw-r--r-- | include/dt-bindings/thermal/mediatek,lvts-thermal.h | 10 |
2 files changed, 12 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml index e6665af52ee6..4173bae53032 100644 --- a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml @@ -19,6 +19,7 @@ properties: compatible: enum: - mediatek,mt7988-lvts-ap + - mediatek,mt8186-lvts - mediatek,mt8192-lvts-ap - mediatek,mt8192-lvts-mcu - mediatek,mt8195-lvts-ap @@ -75,6 +76,7 @@ allOf: compatible: contains: enum: + - mediatek,mt8186-lvts - mediatek,mt8195-lvts-ap - mediatek,mt8195-lvts-mcu then: diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h index 997e2f55128a..433d298826d3 100644 --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h @@ -16,6 +16,16 @@ #define MT7988_ETHWARP_0 6 #define MT7988_ETHWARP_1 7 +#define MT8186_LITTLE_CPU0 0 +#define MT8186_LITTLE_CPU1 1 +#define MT8186_LITTLE_CPU2 2 +#define MT8186_CAM 3 +#define MT8186_BIG_CPU0 4 +#define MT8186_BIG_CPU1 5 +#define MT8186_NNA 6 +#define MT8186_ADSP 7 +#define MT8186_MFG 8 + #define MT8195_MCU_BIG_CPU0 0 #define MT8195_MCU_BIG_CPU1 1 #define MT8195_MCU_BIG_CPU2 2 |