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authorAlban Bedel <[email protected]>2015-04-19 14:30:01 +0200
committerRalf Baechle <[email protected]>2015-06-02 16:07:31 +0200
commita26484bb7e77d474ecef1ef01ce37fb16fb84f60 (patch)
treeef58a98c23baf023196f7544a6ecce97caa9822c
parent9dd6f1c166bc6e7b582f6203f2dc023ec65e3ed5 (diff)
MIPS: ath79: Add a missing new line in log message
The memory setup log is missing a new line. Signed-off-by: Alban Bedel <[email protected]> Cc: [email protected] Cc: Andrew Bresticker <[email protected]> Cc: Qais Yousef <[email protected]> Cc: Wolfram Sang <[email protected]> Cc: Sergey Ryazanov <[email protected]> Cc: Gabor Juhos <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/9771/ Signed-off-by: Ralf Baechle <[email protected]>
-rw-r--r--arch/mips/ath79/setup.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
index a73c93c3d44a..7fc8397d16f2 100644
--- a/arch/mips/ath79/setup.c
+++ b/arch/mips/ath79/setup.c
@@ -225,7 +225,7 @@ void __init plat_time_init(void)
ddr_clk_rate = ath79_get_sys_clk_rate("ddr");
ref_clk_rate = ath79_get_sys_clk_rate("ref");
- pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz",
+ pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz\n",
cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000,
ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000,
ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000,