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authorKrzysztof Kozlowski <[email protected]>2023-12-13 17:28:55 +0100
committerBjorn Andersson <[email protected]>2023-12-16 23:19:14 -0600
commita25d2dbb68aab84a4431d382d6a21539ed6760e5 (patch)
treed25effc04cc2270f0c92e02e1d010899ae32ca29
parent39859a1206e9ec47a00e7e712c5aecb4d352e001 (diff)
arm64: dts: qcom: sm8550: move Soundwire pinctrl to its nodes
Pin configuration for Soundwire bus should be set in Soundwire controller nodes, not in the associated macro codec node. This placement change should not have big impact in general, because macro codec is a clock provider for Soundwire controller, thus its devices is probed first. However it will have impact for disabled Soundwire buses, e.g. WSA2, because after this change the pins will be left in default state. We also follow similar approach in newer SoCs, like Qualcomm SM8650. Signed-off-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
-rw-r--r--arch/arm64/boot/dts/qcom/sm8550.dtsi20
1 files changed, 12 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 735ffd926777..661385ccc436 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -2256,8 +2256,6 @@
#clock-cells = <0>;
clock-output-names = "wsa2-mclk";
- pinctrl-names = "default";
- pinctrl-0 = <&wsa2_swr_active>;
#sound-dai-cells = <1>;
};
@@ -2269,6 +2267,9 @@
clock-names = "iface";
label = "WSA2";
+ pinctrl-0 = <&wsa2_swr_active>;
+ pinctrl-names = "default";
+
qcom,din-ports = <4>;
qcom,dout-ports = <9>;
@@ -2302,8 +2303,6 @@
#clock-cells = <0>;
clock-output-names = "mclk";
- pinctrl-names = "default";
- pinctrl-0 = <&rx_swr_active>;
#sound-dai-cells = <1>;
};
@@ -2315,6 +2314,9 @@
clock-names = "iface";
label = "RX";
+ pinctrl-0 = <&rx_swr_active>;
+ pinctrl-names = "default";
+
qcom,din-ports = <1>;
qcom,dout-ports = <11>;
@@ -2348,8 +2350,6 @@
#clock-cells = <0>;
clock-output-names = "mclk";
- pinctrl-names = "default";
- pinctrl-0 = <&tx_swr_active>;
#sound-dai-cells = <1>;
};
@@ -2367,8 +2367,6 @@
#clock-cells = <0>;
clock-output-names = "mclk";
- pinctrl-names = "default";
- pinctrl-0 = <&wsa_swr_active>;
#sound-dai-cells = <1>;
};
@@ -2380,6 +2378,9 @@
clock-names = "iface";
label = "WSA";
+ pinctrl-0 = <&wsa_swr_active>;
+ pinctrl-names = "default";
+
qcom,din-ports = <4>;
qcom,dout-ports = <9>;
@@ -2409,6 +2410,9 @@
clock-names = "iface";
label = "TX";
+ pinctrl-0 = <&tx_swr_active>;
+ pinctrl-names = "default";
+
qcom,din-ports = <4>;
qcom,dout-ports = <0>;
qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>;