diff options
author | Jagadeesh Kona <[email protected]> | 2023-05-24 23:48:00 +0530 |
---|---|---|
committer | Bjorn Andersson <[email protected]> | 2023-05-26 20:55:18 -0700 |
commit | 9f7579423d2d619064dc84cfa8068e3c83b09e3f (patch) | |
tree | df31c0bb7518260a9652bff49278c1a7cc7dce09 | |
parent | 8368050625f53dd13f1df7b116e3ea1bcb155702 (diff) |
arm64: dts: qcom: sm8550: Add graphics clock controller
Add device node for graphics clock controller on Qualcomm
SM8550 platform.
Signed-off-by: Jagadeesh Kona <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
-rw-r--r-- | arch/arm64/boot/dts/qcom/sm8550.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 29b99003d8a9..20924d570c07 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -6,6 +6,7 @@ #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,sm8450-videocc.h> #include <dt-bindings/clock/qcom,sm8550-gcc.h> +#include <dt-bindings/clock/qcom,sm8550-gpucc.h> #include <dt-bindings/clock/qcom,sm8550-tcsr.h> #include <dt-bindings/clock/qcom,sm8550-dispcc.h> #include <dt-bindings/dma/qcom-gpi.h> @@ -1952,6 +1953,17 @@ #reset-cells = <1>; }; + gpucc: clock-controller@3d90000 { + compatible = "qcom,sm8550-gpucc"; + reg = <0 0x03d90000 0 0xa000>; + clocks = <&bi_tcxo_div2>, + <&gcc GCC_GPU_GPLL0_CLK_SRC>, + <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + remoteproc_mpss: remoteproc@4080000 { compatible = "qcom,sm8550-mpss-pas"; reg = <0x0 0x04080000 0x0 0x4040>; |