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authorAlexandre Belloni <[email protected]>2018-07-31 16:38:54 +0200
committerPaul Burton <[email protected]>2018-07-31 10:34:08 -0700
commit9eaf3ba5e0557eef9c3d9a64c72b9352cdc49d50 (patch)
treeb15570261018b5500c1d44aa6349ac8dd9b46056
parent60bc84e227d24fdb1ac2211c574a88ecd7c836a0 (diff)
mips: dts: mscc: Add spi on Ocelot
Add support for the SPI controller Signed-off-by: Alexandre Belloni <[email protected]> Signed-off-by: Paul Burton <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/20101/ Cc: Mark Brown <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: Thomas Petazzoni <[email protected]> Cc: Allan Nielsen <[email protected]>
-rw-r--r--arch/mips/boot/dts/mscc/ocelot.dtsi11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi
index afe8fc9011ea..f7eb612b46ba 100644
--- a/arch/mips/boot/dts/mscc/ocelot.dtsi
+++ b/arch/mips/boot/dts/mscc/ocelot.dtsi
@@ -91,6 +91,17 @@
status = "disabled";
};
+ spi: spi@101000 {
+ compatible = "mscc,ocelot-spi", "snps,dw-apb-ssi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x101000 0x100>, <0x3c 0x18>;
+ interrupts = <9>;
+ clocks = <&ahb_clk>;
+
+ status = "disabled";
+ };
+
switch@1010000 {
compatible = "mscc,vsc7514-switch";
reg = <0x1010000 0x10000>,