diff options
| author | Bjorn Andersson <[email protected]> | 2023-03-26 18:38:11 -0500 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-04-04 20:51:37 -0700 |
| commit | 9db28f297526f17c6575ec0eefc93a8b1642cff7 (patch) | |
| tree | 8193ba6c5ff5622b9d469e75f90a75b0957834d5 | |
| parent | de7d3d2f9ddef9a3305decccdd3b95b09fd2bd46 (diff) | |
arm64: dts: qcom: sc8280xp: Define uart2
Add the definition for uart2 for sc8280xp devices.
Signed-off-by: Bjorn Andersson <[email protected]>
Signed-off-by: Steev Klimaszewski <[email protected]>
Reviewed-by: Brian Masney <[email protected]>
Reviewed-by: Johan Hovold <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 2b76be6a5f1c..4c75da1bac2d 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1214,6 +1214,20 @@ status = "disabled"; }; + uart2: serial@988000 { + compatible = "qcom,geni-uart"; + reg = <0 0x00988000 0 0x4000>; + clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; + clock-names = "se"; + interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; + operating-points-v2 = <&qup_opp_table_100mhz>; + power-domains = <&rpmhpd SC8280XP_CX>; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>; + interconnect-names = "qup-core", "qup-config"; + status = "disabled"; + }; + i2c3: i2c@98c000 { compatible = "qcom,geni-i2c"; reg = <0 0x0098c000 0 0x4000>; |