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authorRichard Zhu <[email protected]>2022-02-21 14:33:56 +0800
committerShawn Guo <[email protected]>2022-02-22 14:57:30 +0800
commit9baabac707a57c035a47b101e7a7af01340058d6 (patch)
treead1f6c63539a356877c7b239b6ad179fe8b44783
parent7b3c8ad088301765dda94f55e451f4fc8f122825 (diff)
ARM: dts: imx6qp-sabresd: Enable PCIe support
In the i.MX6QP sabresd board(sch-28857) design, one external oscillator is powered up by vgen3 and used as the PCIe reference clock source by the endpoint device. If RC uses this oscillator as reference clock too, PLL6(ENET PLL) would has to be in bypass mode, and ENET clocks would be messed up. To keep things simple, let RC use the internal PLL as reference clock and set vgen3 always on to enable the external oscillator for endpoint device on i.MX6QP sabresd board. NOTE: This reference clock setup is used to pass the GEN2 TX compliance tests, and isn't recommended as a setup in the end-user design. Signed-off-by: Richard Zhu <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
-rw-r--r--arch/arm/boot/dts/imx6qp-sabresd.dts6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts b/arch/arm/boot/dts/imx6qp-sabresd.dts
index 480e73183f6b..f69eec18d865 100644
--- a/arch/arm/boot/dts/imx6qp-sabresd.dts
+++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
@@ -50,8 +50,12 @@
};
};
+&vgen3_reg {
+ regulator-always-on;
+};
+
&pcie {
- status = "disabled";
+ status = "okay";
};
&sata {