diff options
author | Jonathan Neuschäfer <[email protected]> | 2021-05-13 18:09:47 +0200 |
---|---|---|
committer | Linus Walleij <[email protected]> | 2021-05-25 17:10:05 +0200 |
commit | 9b882b73d37932a5ba20d7fdcbe6e3191d9582cd (patch) | |
tree | fa126467c995fe4d9a37880fe2d980d6b4908766 | |
parent | 1ca46d3e43569186bd1decfb02a6b4c4ddb4304b (diff) |
pinctrl: npcm: Align a few entries in the pin function table
The entries for GPIO 33 and 34 are not properly aligned. Fix the
alignment.
Signed-off-by: Jonathan Neuschäfer <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>
-rw-r--r-- | drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index 2535ca720668..bb1ea47ec4c6 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -958,8 +958,8 @@ static const struct npcm7xx_pincfg pincfg[] = { NPCM7XX_PINCFG(31, smb3, MFSEL1, 0, none, NONE, 0, none, NONE, 0, 0), NPCM7XX_PINCFG(32, spi0cs1, MFSEL1, 3, none, NONE, 0, none, NONE, 0, 0), - NPCM7XX_PINCFG(33, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), - NPCM7XX_PINCFG(34, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(33, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(34, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM7XX_PINCFG(37, smb3c, I2CSEGSEL, 12, none, NONE, 0, none, NONE, 0, SLEW), NPCM7XX_PINCFG(38, smb3c, I2CSEGSEL, 12, none, NONE, 0, none, NONE, 0, SLEW), NPCM7XX_PINCFG(39, smb3b, I2CSEGSEL, 11, none, NONE, 0, none, NONE, 0, SLEW), |