diff options
author | Michael Trimarchi <[email protected]> | 2019-12-30 17:30:21 +0530 |
---|---|---|
committer | Shawn Guo <[email protected]> | 2020-01-09 15:43:48 +0800 |
commit | 99c2e3793f93739e3a9f49afe4366e8d1648656c (patch) | |
tree | e42c2894a5026ec70a0dc59bba9ab2afaa20d721 | |
parent | b3d18de3e8231d15a0260a09e79ee4435f8d9161 (diff) |
ARM: dts: imx6qdl-icore: Add fec phy-handle
LAN8720 needs a reset of every clock enable. The reset needs
to be done at device level, due the flag PHY_RST_AFTER_CLK_EN.
So, add phy-handle by creating mdio child node inside fec.
This will eventually move the phy-reset-gpio which is defined
in fec node.
Signed-off-by: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
-rw-r--r-- | arch/arm/boot/dts/imx6qdl-icore.dtsi | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-icore.dtsi b/arch/arm/boot/dts/imx6qdl-icore.dtsi index 7814f1ef0804..756f3a9f1b4f 100644 --- a/arch/arm/boot/dts/imx6qdl-icore.dtsi +++ b/arch/arm/boot/dts/imx6qdl-icore.dtsi @@ -150,10 +150,23 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; - phy-reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; clocks = <&clks IMX6QDL_CLK_ENET>, <&clks IMX6QDL_CLK_ENET>, <&rmii_clk>; phy-mode = "rmii"; + phy-handle = <ð_phy>; status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + eth_phy: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; + reset-assert-us = <4000>; + reset-deassert-us = <4000>; + }; + }; }; &gpmi { |