diff options
| author | Ian Rogers <[email protected]> | 2023-10-25 17:31:43 -0700 |
|---|---|---|
| committer | Namhyung Kim <[email protected]> | 2023-10-28 00:41:41 -0700 |
| commit | 99a8a4c990f5a16c9971f10bc44e4894e0045d2a (patch) | |
| tree | 436a20e26975d27cdbda66c14d1572ff545c1a34 | |
| parent | 8a94d3bfaf45e7995ef12be1a51ec47684c7cb64 (diff) | |
perf vendor events intel: Update a spelling in haswell/haswellx
The spelling of "in-flight" was switched to "inflight".
Signed-off-by: Ian Rogers <[email protected]>
Reviewed-by: Kan Liang <[email protected]>
Cc: Alexandre Torgue <[email protected]>
Cc: Maxime Coquelin <[email protected]>
Cc: Edward Baker <[email protected]>
Cc: Zhengjun Xing <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Namhyung Kim <[email protected]>
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/haswell/memory.json | 2 | ||||
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/haswellx/memory.json | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/tools/perf/pmu-events/arch/x86/haswell/memory.json b/tools/perf/pmu-events/arch/x86/haswell/memory.json index df44c28efeeb..2fc25e22a42a 100644 --- a/tools/perf/pmu-events/arch/x86/haswell/memory.json +++ b/tools/perf/pmu-events/arch/x86/haswell/memory.json @@ -62,7 +62,7 @@ "BriefDescription": "Counts the number of machine clears due to memory order conflicts.", "EventCode": "0xC3", "EventName": "MACHINE_CLEARS.MEMORY_ORDERING", - "PublicDescription": "This event counts the number of memory ordering machine clears detected. Memory ordering machine clears can result from memory address aliasing or snoops from another hardware thread or core to data in-flight in the pipeline. Machine clears can have a significant performance impact if they are happening frequently.", + "PublicDescription": "This event counts the number of memory ordering machine clears detected. Memory ordering machine clears can result from memory address aliasing or snoops from another hardware thread or core to data inflight in the pipeline. Machine clears can have a significant performance impact if they are happening frequently.", "SampleAfterValue": "100003", "UMask": "0x2" }, diff --git a/tools/perf/pmu-events/arch/x86/haswellx/memory.json b/tools/perf/pmu-events/arch/x86/haswellx/memory.json index d66e465ce41a..2d212cf59e92 100644 --- a/tools/perf/pmu-events/arch/x86/haswellx/memory.json +++ b/tools/perf/pmu-events/arch/x86/haswellx/memory.json @@ -62,7 +62,7 @@ "BriefDescription": "Counts the number of machine clears due to memory order conflicts.", "EventCode": "0xC3", "EventName": "MACHINE_CLEARS.MEMORY_ORDERING", - "PublicDescription": "This event counts the number of memory ordering machine clears detected. Memory ordering machine clears can result from memory address aliasing or snoops from another hardware thread or core to data in-flight in the pipeline. Machine clears can have a significant performance impact if they are happening frequently.", + "PublicDescription": "This event counts the number of memory ordering machine clears detected. Memory ordering machine clears can result from memory address aliasing or snoops from another hardware thread or core to data inflight in the pipeline. Machine clears can have a significant performance impact if they are happening frequently.", "SampleAfterValue": "100003", "UMask": "0x2" }, |