diff options
| author | Daniele Ceraolo Spurio <[email protected]> | 2023-11-17 14:51:51 -0800 |
|---|---|---|
| committer | Rodrigo Vivi <[email protected]> | 2023-12-21 11:45:06 -0500 |
| commit | 9897eb855544f0ef0921a5cc4517deb1fcf06c6f (patch) | |
| tree | 78af38badc8a32b847d8d94216a53ca43d45366d | |
| parent | 0881cbe04077785f98496c236386099d20854ad7 (diff) | |
drm/xe/gsc: Define GSCCS for MTL
Add the GSCCS to the media_xelpmp engine list. Note that since the
GSCCS is only used with the GSC FW, we can consider it disabled if we
don't have the FW available.
v2: mark GSCCS as allowed on the media IP in kunit tests
Signed-off-by: Daniele Ceraolo Spurio <[email protected]>
Cc: Alan Previn <[email protected]>
Reviewed-by: John Harrison <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/xe/tests/xe_pci_test.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_hw_engine.c | 20 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_pci.c | 2 |
3 files changed, 24 insertions, 7 deletions
diff --git a/drivers/gpu/drm/xe/tests/xe_pci_test.c b/drivers/gpu/drm/xe/tests/xe_pci_test.c index daf652517608..171e4180f1aa 100644 --- a/drivers/gpu/drm/xe/tests/xe_pci_test.c +++ b/drivers/gpu/drm/xe/tests/xe_pci_test.c @@ -33,13 +33,10 @@ static void check_media_ip(const struct xe_media_desc *media) struct kunit *test = xe_cur_kunit(); u64 mask = media->hw_engine_mask; - /* - * VCS and VECS engines are allowed on the media IP - * - * TODO: Add GSCCS once support is added to the driver. - */ + /* VCS, VECS and GSCCS engines are allowed on the media IP */ mask &= ~(XE_HW_ENGINE_VCS_MASK | - XE_HW_ENGINE_VECS_MASK); + XE_HW_ENGINE_VECS_MASK | + XE_HW_ENGINE_GSCCS_MASK); /* Any remaining engines are an error */ KUNIT_ASSERT_EQ(test, mask, 0); diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index e831e63c5e48..c52c26c395a7 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -26,6 +26,7 @@ #include "xe_rtp.h" #include "xe_sched_job.h" #include "xe_tuning.h" +#include "xe_uc_fw.h" #include "xe_wa.h" #define MAX_MMIO_BASES 3 @@ -610,6 +611,24 @@ static void read_compute_fuses(struct xe_gt *gt) read_compute_fuses_from_dss(gt); } +static void check_gsc_availability(struct xe_gt *gt) +{ + struct xe_device *xe = gt_to_xe(gt); + + if (!(gt->info.engine_mask & BIT(XE_HW_ENGINE_GSCCS0))) + return; + + /* + * The GSCCS is only used to communicate with the GSC FW, so if we don't + * have the FW there is nothing we need the engine for and can therefore + * skip its initialization. + */ + if (!xe_uc_fw_is_available(>->uc.gsc.fw)) { + gt->info.engine_mask &= ~BIT(XE_HW_ENGINE_GSCCS0); + drm_info(&xe->drm, "gsccs disabled due to lack of FW\n"); + } +} + int xe_hw_engines_init_early(struct xe_gt *gt) { int i; @@ -617,6 +636,7 @@ int xe_hw_engines_init_early(struct xe_gt *gt) read_media_fuses(gt); read_copy_fuses(gt); read_compute_fuses(gt); + check_gsc_availability(gt); BUILD_BUG_ON(XE_HW_ENGINE_PREEMPT_TIMEOUT < XE_HW_ENGINE_PREEMPT_TIMEOUT_MIN); BUILD_BUG_ON(XE_HW_ENGINE_PREEMPT_TIMEOUT > XE_HW_ENGINE_PREEMPT_TIMEOUT_MAX); diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index 6d062478c1f2..bbf2f5b64bac 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -199,7 +199,7 @@ static const struct xe_media_desc media_xelpmp = { .name = "Xe_LPM+", .hw_engine_mask = BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VCS2) | - BIT(XE_HW_ENGINE_VECS0), /* TODO: add GSC0 */ + BIT(XE_HW_ENGINE_VECS0) | BIT(XE_HW_ENGINE_GSCCS0) }; static const struct xe_media_desc media_xe2 = { |