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authorVille Syrjälä <ville.syrjala@linux.intel.com>2022-02-09 13:35:25 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2022-02-09 21:52:04 +0200
commit98476876b837069e4582565fee63e70810c880b2 (patch)
tree8a7945d8b18dad19b56f9787c2faf11a0923c6e3
parent28f5f8884e7cb9cff5375db487a8ca7cd3fd599f (diff)
drm/i915: Fix IPS disable in intel_plane_disable_noatomic()
IPS must be disabled prior to disabling the last plane (excluding the cursor). Make the code do that instead of assuming the primary plane would be the last one. This is probably 100% theoretical as the BIOS should never light up the other planes anyway. But no harm in making the code totally consistent. Also let's update the ips_enabled flag in the crtc state afterwards so that the first atomic commit has accurate information about the state of IPS. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220209113526.7595-6-ville.syrjala@linux.intel.com Acked-by: Jani Nikula <jani.nikula@intel.com>
-rw-r--r--drivers/gpu/drm/i915/display/intel_display.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 06a0baba493e..0443ef3671de 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -753,9 +753,11 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
crtc_state->data_rate[plane->id] = 0;
crtc_state->min_cdclk[plane->id] = 0;
- if (plane->id == PLANE_PRIMARY &&
- hsw_ips_disable(crtc_state))
+ if ((crtc_state->active_planes & ~BIT(PLANE_CURSOR)) == 0 &&
+ hsw_ips_disable(crtc_state)) {
+ crtc_state->ips_enabled = false;
intel_crtc_wait_for_next_vblank(crtc);
+ }
/*
* Vblank time updates from the shadow to live plane control register