diff options
| author | Arun R Murthy <[email protected]> | 2023-08-08 09:50:00 +0530 |
|---|---|---|
| committer | Ankit Nautiyal <[email protected]> | 2023-08-14 10:19:32 +0530 |
| commit | 95c23e2085f28e2c763ca202fdc37a1392982c16 (patch) | |
| tree | 9b8bdb38c011f079b3e9616bde0d31d07859ca5e | |
| parent | 58554dbf0991da6a2847b3159594f6306bff978b (diff) | |
drm/i915/dp: Fix LT debug print in SDP CRC enable
The debug print for enabling SDP CRC16 is applicable only for DP2.0, but
this debug print was not within the uhbr check and was always printed.
Fix this by adding proper checks and returning.
v2: Fix typo in commit message (Ankit)
Signed-off-by: Arun R Murthy <[email protected]>
Reviewed-by: Chaitanya Kumar Borah <[email protected]>
Signed-off-by: Ankit Nautiyal <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_link_training.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index a263773f4d68..4485ef4f8ec6 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -1390,11 +1390,13 @@ void intel_dp_128b132b_sdp_crc16(struct intel_dp *intel_dp, * Default value of bit 31 is '0' hence discarding the write * TODO: Corrective actions on SDP corruption yet to be defined */ - if (intel_dp_is_uhbr(crtc_state)) - /* DP v2.0 SCR on SDP CRC16 for 128b/132b Link Layer */ - drm_dp_dpcd_writeb(&intel_dp->aux, - DP_SDP_ERROR_DETECTION_CONFIGURATION, - DP_SDP_CRC16_128B132B_EN); + if (!intel_dp_is_uhbr(crtc_state)) + return; + + /* DP v2.0 SCR on SDP CRC16 for 128b/132b Link Layer */ + drm_dp_dpcd_writeb(&intel_dp->aux, + DP_SDP_ERROR_DETECTION_CONFIGURATION, + DP_SDP_CRC16_128B132B_EN); lt_dbg(intel_dp, DP_PHY_DPRX, "DP2.0 SDP CRC16 for 128b/132b enabled\n"); } |