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authorJisheng Zhang <[email protected]>2023-01-29 01:28:54 +0800
committerPalmer Dabbelt <[email protected]>2023-01-31 23:29:43 -0800
commit95bc69a47be2d5cdccf40ba3f23c99e9a6c57597 (patch)
tree26924617e5e749c2ff4574646b74b95f11e48901
parentcabfd146b371462ed480a968f98eb0c2c80e3c8a (diff)
riscv: cpu_relax: switch to riscv_has_extension_likely()
Switch cpu_relax() from static branch to the new helper riscv_has_extension_likely() Signed-off-by: Jisheng Zhang <[email protected]> Reviewed-by: Andrew Jones <[email protected]> Reviewed-by: Heiko Stuebner <[email protected]> Reviewed-by: Guo Ren <[email protected]> Reviewed-by: Conor Dooley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
-rw-r--r--arch/riscv/include/asm/vdso/processor.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/include/asm/vdso/processor.h b/arch/riscv/include/asm/vdso/processor.h
index fa70cfe507aa..edf0e25e43d1 100644
--- a/arch/riscv/include/asm/vdso/processor.h
+++ b/arch/riscv/include/asm/vdso/processor.h
@@ -10,7 +10,7 @@
static inline void cpu_relax(void)
{
- if (!static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_ZIHINTPAUSE])) {
+ if (!riscv_has_extension_likely(RISCV_ISA_EXT_ZIHINTPAUSE)) {
#ifdef __riscv_muldiv
int dummy;
/* In lieu of a halt instruction, induce a long-latency stall. */