diff options
| author | Dmitry Baryshkov <[email protected]> | 2022-05-21 23:27:01 +0300 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2022-06-28 16:05:57 -0500 |
| commit | 924bbd8dd60e094344711c3526a5b308d71dc008 (patch) | |
| tree | 4e8088b1783788dba89be15d7614517095c6b1c0 | |
| parent | 1c047919763b4548381d1ab3320af1df66ab83df (diff) | |
arm64: dts: qcom: sdm630: fix the qusb2phy ref clock
According to the downstram DT file, the qusb2phy ref clock should be
GCC_RX0_USB2_CLKREF_CLK, not GCC_RX1_USB2_CLKREF_CLK.
Fixes: c65a4ed2ea8b ("arm64: dts: qcom: sdm630: Add USB configuration")
Cc: Konrad Dybcio <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Marijn Suijten <[email protected]>
Signed-off-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 45a1e8cfcdea..1c8709753868 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1266,7 +1266,7 @@ #phy-cells = <0>; clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, - <&gcc GCC_RX1_USB2_CLKREF_CLK>; + <&gcc GCC_RX0_USB2_CLKREF_CLK>; clock-names = "cfg_ahb", "ref"; resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; |