diff options
| author | Tejas Upadhyay <[email protected]> | 2021-01-29 10:29:43 -0800 |
|---|---|---|
| committer | José Roberto de Souza <[email protected]> | 2021-02-01 07:57:17 -0800 |
| commit | 918cc934682f4385506dbf95beed4f4bfd1e377f (patch) | |
| tree | 03a204e7f4c497da92e7ca5c28d4584f905b2a04 | |
| parent | 75b81fbbcad2648195fd1323b95c3a77393e4ad1 (diff) | |
drm/i915/adl_s: Update memory bandwidth parameters
Just like RKL, the ADL_S platform also has different memory
characteristics from past platforms. Update the values used
by our memory bandwidth calculations accordingly.
v2: Fix minor nitpick for shifting ADLS case above RKL(based on platform
order).(mdroper)
Bspec: 64631
Cc: Matt Roper <[email protected]>
Cc: Lucas De Marchi <[email protected]>
Cc: Jani Nikula <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Cc: Imre Deak <[email protected]>
Signed-off-by: Tejas Upadhyay <[email protected]>
Signed-off-by: Aditya Swarup <[email protected]>
Reviewed-by: Anusha Srivatsa <[email protected]>
Signed-off-by: José Roberto de Souza <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_bw.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index bd060404d249..d7575aada450 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.c +++ b/drivers/gpu/drm/i915/display/intel_bw.c @@ -205,6 +205,12 @@ static const struct intel_sa_info rkl_sa_info = { .displayrtids = 128, }; +static const struct intel_sa_info adls_sa_info = { + .deburst = 16, + .deprogbwlimit = 38, /* GB/s */ + .displayrtids = 256, +}; + static int icl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel_sa_info *sa) { struct intel_qgv_info qi = {}; @@ -315,7 +321,9 @@ void intel_bw_init_hw(struct drm_i915_private *dev_priv) if (!HAS_DISPLAY(dev_priv)) return; - if (IS_ROCKETLAKE(dev_priv)) + if (IS_ALDERLAKE_S(dev_priv)) + icl_get_bw_info(dev_priv, &adls_sa_info); + else if (IS_ROCKETLAKE(dev_priv)) icl_get_bw_info(dev_priv, &rkl_sa_info); else if (IS_GEN(dev_priv, 12)) icl_get_bw_info(dev_priv, &tgl_sa_info); |